ARTICLE FOCUS:

• System-level requirements
• Integration into silicon
• Design partitioning

According to the World Health Organization, cardiovascular disease is the leading cause of death globally. An estimated 17.5 million people died from cardiovascular disease in 2008, representing 30% of all global deaths. Of these deaths, 7.2 million were due to heart attack, and 6.1 million were due to stroke. By 2015, the estimate increases. Cardiovascular disease is projected to claim the lives of 20 million people, primarily from heart attack and stroke. Many of these deaths may occur with no previous symptoms of cardiovascular disease.

Electrocardiogram (ECG) monitors are vital tools used by healthcare providers to help identify cardiac conditions and monitor patient health. An ECG monitor can come in many forms, ranging from simple handheld devices for remote monitoring to sophisticated patient monitoring systems used by hospitals. Regardless of the system design, market demands and trends are driving cardiac device manufacturers to develop lower cost, lower power products with increased functionality.

With the ever increasing clinical need for cardiac monitoring devices comes the continuous flow of technical challenges. As with many commercial portable products, these devices share the same need to reduce size, weight, and power (SWaP). Thus the need for device integration becomes imperative. While this article focuses on the key electronic features of cardiac monitoring devices and the integration of these features into silicon, it also discusses how technology companies can provide solutions to meet different aspects of the design. The article explores the different ways a design can be partitioned and the trade-offs associated with those design choices.

Common functions for integrated circuits in ECG
A vast majority of the integrated circuits supporting the cardiac monitoring devices can be divided into the following sections:

• Analog front end
• Power management
• Communications
• Software algorithms
• Packaging technologies

Figure 1 shows a basic block diagram for a cardiac monitoring device. Notice that it incorporates several key pieces of technology. Each of these must be evaluated before a hardware platform can be selected for use within the application.

Analog front end (AFE)
The sensing section of a cardiac monitoring device can be referred to collectively as the analog front end (AFE). The AFE’s unique requirements are often responsible for many integrated circuit (IC) technology challenges. Analog interfaces often require high voltages for sensing, which in many cases means they do not lend themselves easily to integration into the digital world, whereas as IC technology continues to shrink in size the ICs inherently cannot tolerate the higher voltages required.

The challenge of how and why a designer chooses to partition the electronics is one of the vigorously debated topics in cardiac monitoring device design. To begin, let’s define what is meant by design partitioning as the term applies to ICs. Design partitioning is the process by which we determine the electronic blocks or features that will be grouped together on a single silicon die or in an IC package. Because smaller size and lower power are often critical parameters, it might seem obvious that maximum integration is always preferred. However, there are many trade-offs and options that must be considered when determining an optimum design partition.

First and foremost, integration of certain components or component values may not lend themselves to silicon integration. This is usually the case for inductors and large capacitor values. Certain protection structures such as those for enhanced electrostatic discharge (ESD) protection might be more efficiently implemented with a small external discrete device.

Another factor to consider in design partitioning is flexibility. Embedding a microprocessor and memory into a full custom system-on-a-chip (SOC) means that any future upgrades to the microprocessor and memory equates to a full revision of the SOC. A revision to a custom IC is usually costly and time consuming. Similarly, embedding the radio-frequency (RF) communications into a SOC locks the device into a specific communications standard. For these reasons as well as others, design flexibility must be considered when partitioning the design.